1. Technical Field
The present invention relates to a Delay-Locked Loop (DLL) and more particularly, to a DLL capable of directly receiving external clock signals.
2. Discussion of the Related Art
In a typical input/output (I/O) interface method in which data is synchronously transmitted with a clock frequency, such as when data is transmitted between a memory device and a memory controller, a correct synchronization between a clock signal and the data becomes increasingly important due to an expanding bus load and rising clock frequency.
Thus, it is necessary to correctly locate the data at an edge or a center of the clock signal by considering the transmission time of the data when it is transmitted from components to buses. Circuits commonly used for this purpose include a Phase-Locked Loop (PLL) and a Delay-Locked Loop (DLL).
A difference between the PLL and the DLL is that the PLL uses a Voltage Controlled Oscillator (VCO) as a synchronization circuit, while the DLL uses a Voltage Controlled Delay Line (VCDL) as a synchronization circuit.
The PLL including the VCO generally allows clock multiplication, however, a jitter accumulates in the VCO. A DLL using a delay line does not allow clock multiplication, however, it does not cause jitter accumulation. Therefore, a semiconductor memory such as a dynamic random access memory (DRAM) uses a DLL that has suitable clocking and jitter characteristics because its input and output frequencies are the same.
However, when the DLL receives an external clock signal, the DLL amplifies and receives a level of the external clock signal, which typically has a Transistor-Transistor Logic (TTL) level, using an amplifying buffer. The amplifying buffer then amplifies the external clock signal with the TTL level to a Complementary Metal Oxide Semiconductor (CMOS) level. Thus, in a case where delay cells of the delay line of the DLL receiving the external clock signal are differential amplifier type analog cells, the DLL can directly receive the external clock signal having the TTL level without using the amplifying buffer. In this case, however, use of the amplifying buffer consumes time for buffering and increases current consumption.